SAN JOSE, CA -- (MARKET WIRE) -- 05/29/2007 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, today announced enhancements to the "design with verification" component of its Cadence® Logic Design Team Solution, resulting in significant productivity improvements for logic designers. The new capabilities dramatically reduce key verification bottlenecks, which have prevented the effective use of assertion-based verification early in the development process. (more...)Wednesday, May 30, 2007
Chipdesignmag: Enhanced Design with Verification Flow Improves Productivity
SAN JOSE, CA -- (MARKET WIRE) -- 05/29/2007 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, today announced enhancements to the "design with verification" component of its Cadence® Logic Design Team Solution, resulting in significant productivity improvements for logic designers. The new capabilities dramatically reduce key verification bottlenecks, which have prevented the effective use of assertion-based verification early in the development process. (more...)
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Thanks for writing this.
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